Implementation and Online Verification of SMS4 Algorithm Based on FPGA
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    Abstract:

    Aiming at the problems of software encryption including the excessive use of host system resources, complex data processing, and slow encryption speed, a method of hardware encryption was proposed. Hardware encryption has the advantages of low cost and fast encryption speed, which can reduce the burden of CPU and improve service performance. By using Vivado 2016.3 development tools and Verilog HDL hardware description language, this paper completed the SMS4 algorithm design input, functional testing and timing simulation, and encapsulated them into independent IP core. The testing system was designed on ZYNQ chip, the user-defined IP was called through ARM processor and the verification of the algorithm in actual application was finished. The research results show that the designed algorithm has the correct function and good performance. In the ac- tual hardware test process, the algorithm is running correctly with the maximum working frequency of 200 MHz and the data throughput rate of 800 Mbps.

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张利华,吴松,蒋腾飞,姜攀攀.基于FPGA的SMS4算法实现及在线验证[J].华东交通大学学报英文版,2018,35(5):111-116.
Zhang Lihua, Wu Song, Jiang Tengfei, Jiang Panpan. Implementation and Online Verification of SMS4 Algorithm Based on FPGA[J]. JOURNAL OF EAST CHINA JIAOTONG UNIVERSTTY,2018,35(5):111-116

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  • Received:
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  • Online: May 26,2021
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